HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 645

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

19.8
Port G comprises a 5-bit input/output port and 3-bit input port with the pin configuration shown in
figure 19.7. Each pin has an input pull-up MOS, which is controlled by the port G control register
(PGCR) in the PFC.
19.8.1
Table 19.13 summarizes the port G register.
Table 19.13 Port G Register
Notes: This register is located in area 1 of physical space. Therefore, when the cache is on, either
Name
Port G data register
access this register from the P2 area of logical space or else make an appropriate setting
using the MMU so that this register is not cached.
* Means no value.
*1 When address translation by the MMU does not apply, the address in parentheses
Port G
Register Description
should be used.
Port G
Abbreviation
PGDR
Figure 19.7 Port G
PTG7 (input) / IOIS16 (input)
PTG6 (input) / ASEMD0 (input)
PTG5 (input) / ASEBRKAK (output)
PTG4 (input) / CKIO2 (output)
PTG3 (input) / AUDATA3 (input/output)
PTG2 (input) / AUDATA2 (input/output)
PTG1 (input) / AUDATA1 (input/output)
PTG0 (input) / AUDATA0 (input/output)
R/W
R/W
Initial Value
H'**
Rev. 5.00, 09/03, page 599 of 760
Address
H'0400012C
(H'A400012C) *
1
Access Size
8