HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 222

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

4. Register specifications
5. Register specifications
Rev. 5.00, 09/03, page 176 of 760
BARA = H'00037226, BAMRA = H'00000000, BBRA = H'005A, BARB = H'0003722E,
BAMRB = H'00000000, BBRB = H'0056, BDRB = H'00000000, BDMRB = H'00000000,
BRCR = H'00000008, BASRA = H'80, BASRB = H'70
Specified conditions: Channel A/channel B sequence mode
•
•
Since instruction fetch is not a write cycle on channel A, a sequence condition does not match.
Therefore, no user break occurs.
BARA = H'00000500, BAMRA = H'00000000, BBRA = H'0057, BARB = H'00001000,
BAMRB = H'00000000, BBRB = H'0057, BDRB = H'00000000, BDMRB = H'00000000,
BRCR = H'00300001, BETR = H'0005
Specified conditions: Channel A/channel B independent mode
•
•
On channel A, a user break occurs before an instruction of address H'00000500 is executed.
On channel B, a user break occurs before the fifth instruction execution after instructions of
address H'00001000 are executed four times.
Address:
Bus cycle: CPU/instruction fetch (before instruction execution)/write/word
Address:
Data:
Bus cycle: CPU/instruction fetch (before instruction execution)/read/word
Address:
Bus cycle: CPU/instruction fetch (before instruction execution)/read/longword
Address:
Data:
Bus cycle: CPU/instruction fetch (before instruction execution)/read/longword
The number of execution-times break enable (5 times)
Channel A
Channel B
Channel A
Channel B
H'00037226, Address mask: H'00000000, ASID: H'80
H'0003722E, Address mask: H'00000000, ASID: H'70
H'00000000, Data mask: H'00000000
H'00000500, Address mask: H'00000000
H'00001000, Address mask: H'00000000
H'00000000, Data mask: H'00000000