HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 231
HD6417709SF133B
Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of HD6417709SF133B
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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Bit 0—Module Standby 0 (MSTP0): Specifies halting of the clock supply to the serial
communication interface SCI (an on-chip peripheral module). When the MSTP0 bit is set to 1, the
supply of the clock to the SCI is halted.
8.2.2
The standby control register 2 (STBCR2) is a readable/writable 8-bit register that sets the power-
down mode. STBCR2 is initialized to H'00 by a power-on reset.
Bit 7—Reserved: The write value set in the program should always be 1.
Bit 6—Pin MD5 to MD0 Control (MDCHG): Specifies whether or not pins MD5 to MD0 are
changed in standby mode. When this bit is set to 1, the MD5 to MD0 pin values are latched when
returning from standby mode by means of a reset or interrupt.
Bit 5— Module Stop 8 (MSTP8): Specifies halting of the clock supply to the user break
controller UBC (an on-chip peripheral module). When the MSTP8 bit is set to 1, the supply of the
clock to the UBC is halted.
Bit 0: MSTP0
0
1
Bit 6: MDCHG
0
1
Bit 5: MSTP8
0
1
Initial value:
Standby Control Register 2 (STBCR2)
R/W:
Bit:
Description
SCI operates
Clock supply to SCI is halted
Description
Pins MD5 to MD0 are not changed in standby mode
Pins MD5 to MD0 are changed in standby mode
Description
UBC runs
Clock supply to UBC is halted
R/W
7
0
MDCHG MSTP8
R/W
6
0
R/W
5
0
MSTP7
R/W
4
0
MSTP6
R/W
3
0
Rev. 5.00, 09/03, page 185 of 760
MSTP5
R/W
2
0
MSTP4
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
MSTP3
R/W
0
0
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