HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 621

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

18.3.6
The port F control register (PFCR) is a 16-bit readable/writable register that selects the pin
functions. PFCR is initialized to H'AAAA (ASEMD0 = 1) or H'00AA (ASEMD0 = 0) by a power-
on reset, but is not initialized by a manual reset, in standby mode, or in sleep mode.
Bits 15 and 14—PF7 Mode 1 and 0 (PF7MD1, PF7MD0)
Bits 13 and 12—PF6 Mode 1 and 0 (PF6MD1, PF6MD0)
Bits 11 and 10—PF5 Mode 1 and 0 (PF5MD1, PF5MD0)
Bits 9 and 8—PF4 Mode 1 and 0 (PF4MD1, PF4MD0)
Bits 7 and 6—PF3 Mode 1 and 0 (PF3MD1, PF3MD0)
Bits 5 and 4—PF2 Mode 1 and 0 (PF2MD1, PF2MD0)
Bits 3 and 2—PF1 Mode 1 and 0 (PF1MD1, PF1MD0)
Bits 1 and 0—PF0 Mode 1 and 0 (PF0MD1, PF0MD0)
These bits select the pin functions and perform input pull-up MOS control.
Initial value:
Bit (2n + 1)
PFnMD1
0
0
1
1
Bit (2n + 1)
PFnMD1
0
0
1
1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit:
Port F Control Register (PFCR)
MD1
PF7
1/0
15
Bit 2n
PFnMD0
0
1
0
1
Bit 2n
PFnMD0
0
1
0
1
MD0
PF7
14
0
MD1
PF6
1/0
13
MD0
PF6
12
0
Pin Function
Other function (see table 18.1)
Reserved
Port input (Pull-up MOS: on)
Port input (Pull-up MOS: off)
Pin Function
Other function (see table 18.1)
Reserved
Port input (Pull-up MOS: on)
Port input (Pull-up MOS: off)
MD1
PF5
1/0
11
MD0
PF5
10
0
MD1
PF4
1/0
9
MD0
PF4
8
0
MD1
PF3
7
1
MD0
PF3
6
0
Rev. 5.00, 09/03, page 575 of 760
MD1
PF2
5
1
(Initial value) (ASEMD0 = 0)
(Initial value) (ASEMD0 = 1)
MD0
PF2
4
0
MD1
PF1
3
1
MD0
PF1
(Initial value)
2
0
(n = 4 to 7)
(n = 0 to 3)
MD1
PF0
1
1
MD0
PF0
0
0