HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 664

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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20.2.2
Note: * Write 0 to clear the flag.
ADCSR is an 8-bit readable/writable register that selects the mode and controls the A/D converter.
ADCSR is initialized to H'00 by a reset and in standby mode.
Bit 7—A/D End Flag (ADF): Indicates the end of A/D conversion.
Bit 7: ADF
0
1
Bit 6—A/D Interrupt Enable (ADIE): Enables or disables the interrupt (ADI) requested at the
end of A/D conversion. The ADIE bit should be set while the A/D conversion stops.
Bit 6: ADIE
0
1
Rev. 5.00, 09/03, page 618 of 760
Initial value:
A/D Control/Status Register (ADCSR)
R/W:
Bit:
Description
[Clearing conditions]
(1) Cleared by reading ADF while ADF = 1, then writing 0 to ADF
(2) Cleared when DMAC is activated by ADI interrupt and ADDR is read
[Setting conditions]
(1) Single mode: A/D conversion ends
(2) Multi mode: A/D conversion ends on all selected channels
(3) Scan mode: A/D conversion ends on all selected channels
Description
A/D end interrupt request (ADI) is disabled
A/D end interrupt request (ADI) is enabled
R/(W) *
ADF
7
0
ADIE
R/W
6
0
ADST
R/W
5
0
MULTI
R/W
4
0
CKS
R/W
3
0
CH2
R/W
2
0
CH1
R/W
1
0
(Initial value)
(Initial value)
CH0
R/W
0
0

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