HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 551

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Serial Data Reception: The processing procedures in smart card mode are the same as in ordinary
SCI processing. The reception processing flowchart is shown in figure 15.7.
1. Initialize the smart card interface mode as described above in Initialization and in figure 15.5.
2. Check that the ORER and PER flags in SCSSR are cleared to 0. If either flag is set, clear both
to 0 after performing the appropriate error handling procedures.
3. Repeat steps 2 and 3 until the RDRF flag is set to 1.
4. Read the receive data from SCRDR.
5. To receive more data, clear the RDRF flag to 0 and return to step 2.
6. To end reception, clear the RE bit to 0.
This processing can be interrupted. When the RIE bit is set to 1 and interrupt requests are enabled,
a receive-data-full interrupt (RXI) will be requested when the RDRF flag is set to 1 at the end of
reception. When an error occurs during reception and either the ORER or PER flag is set to 1, a
communication error interrupt (ERI) will be requested. See Interrupt Operation below for more
information.
The received data will be transferred to SCRDR even when a parity error occurs during reception
and PER is set to 1, so this data can still be read.
Rev. 5.00, 09/03, page 505 of 760