HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 60

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

FP-208C
FP-208E
130
131
132
—
133
134
—
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
Rev. 5.00, 09/03, page 14 of 760
Number of Pins
BP-240A
L17
K18
K17
K16
K19
J17
J16
J18
J19
H16
H17
H18
H19
G16
G17
G18
G19
F16
F17
F18
F19
E16
E17
D16
E19
D17
Pin Name
AUDATA[3]/PTG[3]
AUDATA[2]/PTG[2]
Vss
Vss
AUDATA[1]/PTG[1]
Vcc
Vcc
AUDATA[0]/PTG[0]
TRST/PTF[7]/PINT[15]
TMS/PTF[6]/PINT[14]
TDI/PTF[5]/PINT[13]
TCK/PTF[4]/PNT[12]
IRLS3/PTF[3]/
PINT[11]
IRLS2/PTF[2]/
PINT[10]
IRLS1/PTF[1]/PINT[9]
IRLS0/PTF[0]/PINT[8]
MD0
Vcc-PLL1 *
CAP1
Vss-PLL1 *
Vss-PLL2 *
CAP2
Vcc-PLL2 *
AUDCK/PTH[6]
Vss
Vss
2
2
2
2
I/O
I/O / I
I/O/I
—
—
I/O / I
—
—
I/O / I
I
I
I
I
I
I
I
I
I
—
—
—
—
—
—
I
—
—
Description
AUD data / input port G
AUD data / input port G
Power supply (0 V)
Power supply (0 V)
AUD data / input port G
Power supply ( *
Power supply ( *
AUD data / input port G
Test reset / input port F / port
interrupt
Test mode switch / input port F /
port interrupt
Test data input / input port F / port
interrupt
Test clock / input port F / port
interrupt
External interrupt request / input
port F / port interrupt
External interrupt request / input
port F / port interrupt
External interrupt request / input
port F / port interrupt
External interrupt request / input
port F / port interrupt
Clock mode setting
PLL1 power supply ( *
PLL1 external capacitance pin
PLL1 power supply (0 V)
PLL2 power supply (0 V)
PLL2 external capacitance pin
PLL2 power supply ( *
AUD clock / input port H
Power supply (0 V)
Power supply (0 V)
3
3
)
)
3
3
)
)