HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 263

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417709SF133B
Manufacturer:
RENESAS
Quantity:
79
Part Number:
HD6417709SF133B
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417709SF133B
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6417709SF133B-V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6417709SF133BV
Manufacturer:
RENESAS
Quantity:
1 000
Part Number:
HD6417709SF133BV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Note: If bits CKS2–CKS0 are modified when the WDT is running, the up-count may not be
9.7.3
The watchdog timer counter (WTCNT) and watchdog timer control/status register (WTCSR) are
more difficult to write to than other registers. The procedure for writing to these registers is given
below.
Writing to WTCNT and WTCSR: These registers must be written to using a word transfer
instruction. They cannot be written to with a byte or longword transfer instruction. When writing
to WTCNT, set the upper byte to H'5A and transfer the lower byte as the write data, as shown in
figure 9.3. When writing to WTCSR, set the upper byte to H'A5 and transfer the lower byte as the
write data. This transfer procedure writes the lower byte data to WTCNT or WTCSR.
Bit 2: CKS2
0
1
WTCNT write
WTCSR write
Address: H'FFFFFF84
Address: H'FFFFFF86
performed correctly. Ensure that these bits are modified only when the WDT is not running.
Notes on Register Access
0
1
0
1
Bit 1: CKS1
Figure 9.3 Writing to WTCNT and WTCSR
15
15
Bit 0: CKS0
0
1
0
1
0
1
0
1
H'5A
H'A5
Clock Division Ratio
1
1/4
1/16
1/32
1/64
1/256
1/1024
1/4096
(Initial value)
8
8
7
7
Rev. 5.00, 09/03, page 217 of 760
Overflow Period
(when P = 15 MHz)
17 s
68 s
273 s
546 s
1.09 ms
4.36 ms
17.48 ms
69.91 ms
Write data
Write data
0
0

Related parts for HD6417709SF133B