MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 800

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Modular Input/Output Subsystem (MIOS14)
17.12.4.2 Interrupt Enable Register (MIOS14ER1)
This register contains the interrupt enable bits for the submodules. Each bit corresponds to a given
submodule.
17.12.4.3 Interrupt Request Pending Register (MIOS14RPR1)
This register is a read only register that contains the interrupt pending bits for the submodules. Each bit
corresponds to a given submodule. When one of these bits is set, it means that a submodule raised its flag
and the corresponding enable was set.
As this register is read only, a write to this register has no other effect than generating a bus error if the bus
error option is selected.
17-68
SRESET
SRESET
10:15
Bits
0:4
5:6
7:9
Bits
Field
Field
0:4
5:6
Addr
Addr
EN31:27
EN24:22
EN21:16
MSB
MSB
IRP
EN
Name
31
31
IRP31:27 Pending Bits — MDASM pending bits [31:27]
0
0
—
Name
—
IRP
EN
30
30
Figure 17-40. Interrupt Request Pending Register (MIOS14RPR1)
1
1
Enable Bits — MDASM enable bits [31:27]
Reserved
Enable Bits — MMCSM enable bits [24:22]
Enable Bits — PWMSM enable bits [21:16]
Reserved
IRP
Figure 17-39. Interrupt Enable Register (MIOS14ER1)
EN
29
29
2
2
Table 17-40. MIOS14RPR1 Bit Descriptions
Table 17-39. MIOS14ER1 Bit Descriptions
IRP
MPC561/MPC563 Reference Manual, Rev. 1.2
EN
28
28
3
3
IRP
EN
27
27
4
4
5
5
0000_0000_0000_0000
—
—
6
6
0x30 6C44
0x30 6C46
Undefined
IRP
EN
24
24
7
7
Description
Description
IRP
EN
23
23
8
8
IRP
EN
22
22
9
9
IRP
EN
21
21
10
10
IRP
EN
20
20
11
11
IRP
EN
19
19
12
12
Freescale Semiconductor
IRP
EN
18
18
13
13
IRP
EN
17
17
14
14
IRP
LSB
LSB
EN
16
16
15
15