MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 1369

IC MPU 32BIT W/CODE COMP 388PBGA

MPC564CZP40

Manufacturer Part Number
MPC564CZP40
Description
IC MPU 32BIT W/CODE COMP 388PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564CZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC564CZP40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Note: All delays are in system clock periods.
Freescale Semiconductor
1
2
3
MMCSM Enable to counter bus increment
(MIN)
MMCSM Enable to counter bus increment
(MAX)
Minimum output resolution depends on MMCSM and MCPSM prescaler settings.
Maximum resolution is obtained by setting CPSMPSL[3:0] =0x2 and MMCSMSCR_CP[7:0] =0xFF.
The exact timing from MMCSM enable to the pin being set depends on the timing of the MMCSMSCR register write
and the MCPSM VS_PCLK. The MMCSM enable is taken to mean the MMCSMSCR_CLS[1:0] being written to
2‘b11.
MMCSM clock pin
Counter bus[15:0]
3
3
MMCSM pin
Figure G-51. MMCSM Minimum Input Pin (Either Load or Clock) Timing Diagram
f
SYS
Figure G-52. MMCSM Clock Pin to Counter Bus Increment Timing Diagram
Characteristic
f
f
SYS
is the internal system clock for the IMB3 bus.
SYS
Table G-25. MMCSM Timing Characteristics (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
t
PCCB
t
PPER
min
A
Symbol
t
t
NOTE
MCME
MCME
A+1
t
PLO
min
4 + MCPSMSCR_PSL*
(255 - MMCSMSCR_CP)
4 + MCPSMSCR_PSL * (255 - MMCSMSCR_CP)
+ (MCPSMSCR_PSL - 1)
Min
t
min
PHI
66-MHz Electrical Characteristics
3
3
Max
G-63

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