MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 1215

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Note: L = L-bus, U = U-bus, E = E-bus, C = CMF (Flash), IMB = intermodule bus, DC = DECRAM
Note: Shaded areas = address phase ; Non-shaded areas = data phase
Freescale Semiconductor
1
2
3
4
Instruction Fetch->
cmf
2 consecutive
accesses and
External Bus-> cmf
N is the number of read cycle clocks from external address valid until external data valid. In the case of zero wait states,
N = 2.
Core instruction fetch data bus is usually the U-bus
8 clocks are dedicated for external accesses, and internal accesses are denied.
Assuming the external master immediately retries
Access
Table E-2. Instruction Timing Examples for Different Buses (continued)
E
1
C,U
2
Retr
MPC561/MPC563 Reference Manual, Rev. 1.2
U
C
3
y
—
E
4
4
3
—
5
Number of Clocks
—
U
6
—
U
7
—
E
8
—
9
10
—
11
—
12
U
Memory Access Timing
13
U
Total
11
2
8
E-3