MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 799

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

As this register is read only, a write to this register has no other effect than generating a bus error if the bus
error option is selected.
17.12.4 MIRSM1 Interrupt Registers
17.12.4.1 Interrupt Status Register (MIOS14SR1)
This register contains the flag bits that are raised when the submodules generate an interrupt. Each bit
corresponds to a given submodule.
Freescale Semiconductor
SRESET
SRESET
10:15
Bits
Field IRP15 IRP14 IRP13 IRP12 IRP1
Addr
10:15
0:4
5:6
7:9
Bits
Field FLG
0:4
5:6
7:9
Addr
MSB
IRP15:1
0
IRP8:6
IRP5:0
MSB
Name
31
FLGL24:22 Flag Bits— MMCSM flag bits [24:22]
0
FLG31:27
FLG21:16
—
1
Name
—
1
FLG
Figure 17-37. Interrupt Request Pending Register (MIOS14RPR0)
30
1
Pending Bits — MDASM pending bits [15:11]
Reserved
Pending Bits — MMCSM pending bits [8:6]
Pending Bits — PWMSM pending bits [5:0]
2
Flag Bits — MDASM flag bits [31:27]
Reserved
Flag Bits — PWMSM flag bits [21:16]
FLG
Figure 17-38. Interrupt Status Register (MIOS14SR1)
29
2
3
Table 17-37. MIOS14PR0 Bit Descriptions
Table 17-38. MIOS14SR1 Bit Descriptions
FLG
MPC561/MPC563 Reference Manual, Rev. 1.2
28
3
4
FLG
27
4
5
—
5
0000_0000_0000_0000
0000_0000_0000_0000
—
6
6
IRP8 IRP7 IRP6 IRP5 IRP4 IRP3 IRP2 IRP1 IRP0
0x30 6C06
0x30 6C40
FLG
7
24
7
Description
Description
FLG
8
23
8
FLG
22
9
9
FLG
21
10
10
Modular Input/Output Subsystem (MIOS14)
FLG
20
11
11
FLG
19
12
12
FLG
18
13
13
FLG
17
14
14
FLG
LSB
16
15
LSB
15
17-67