MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 752

IC MPU 32BIT W/CODE COMP 388PBGA

MPC564CZP40

Manufacturer Part Number
MPC564CZP40
Description
IC MPU 32BIT W/CODE COMP 388PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564CZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC564CZP40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Modular Input/Output Subsystem (MIOS14)
17.8.1
17-20
Counter Clock
Programmable 16-bit modulus up-counter with a built-in programmable 8-bit prescaler clocked by
MCPSM
Maximum increment frequency of the counter:
— clocked by the internal MCPSM output: f
— clocked by the external signal: f
Flag setting and possible interrupt generation on overflow of the up-counter register
Modulus Value
Two’s Complement
MMCSM Features
signal (MMCnL)
signal (MMCnC)
Modulus Load
Clock input
0xFFFF
PINC
PINC
PINL
8-bit Prescale
Mod.Register
EDGN
CP7 - CP0
8-bit Clock
Prescaler
Detect
Edge
Figure 17-11. MMCSM Modulus Up-Counter
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 17-10. MMCSM Block Diagram
EDGP
Edge
Detect
CLS0
SYS
Select
Clock
/ 4
CLS1
Enable
MMCSMCNT
Clock
MMCSMML
Load
SYS
FREN
Control
Load
/ 2
Clock
Counter Reload
16-bit Up-Counter Reg.
16-bit Counter Bus
16-bit Modulus
Latch Reg.
Overflow
MIOB
Request Bus
Flag
Freescale Semiconductor

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