MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 133

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Freescale Semiconductor
MODCK[2:3]
SGPIOC5
Signal List
IRQ[6:7]
SGPIOC4
MODCK1
PULL_SEL
TSIZ[0:1]
RD/WR
BURST
IRQ5
TS
BDIP
IRQ4 /
AT2 /
7,12
10
7
10
7
7
/
11
7
7
3
1
/
11
/
Voltage
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
5 V
5 V
Table 2-14. MPC561/MPC563 Signal Reset State (continued)
Controlled
Slew Rate
Option?
Yes
MPC561/MPC563 Reference Manual, Rev. 1.2
No
No
No
No
No
No
No
No
No
No
No
No
No
50 ; 50
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
Drive
Load
(pF)
NA
NA
NA
NA
NA
NA
2
5
PD until reset
negates
PD until reset
negates
PD until PRDS
is set
PU2.6 until reset
negates
PU2.6 until
PRDS is set
PU2.6V until
reset negates
PU2.6 until
SPRDS is set
PU2.6 until reset
negates
PU5, external
pull device
required
PD when driver
not enabled or
until SPRDS is
set
PU2.6 when
driver not
enabled or until
SPRDS is set
PU2.6 when
driver not
enabled or until
SPRDS is set
PU2.6 when
driver not
enabled or until
SPRDS is set
PU2.6 when
driver not
enabled or until
SPRDS is set
Reset State
6, 8
6, 8
Hysteresi
Enabled?
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
s
IRQ4
MODCK1 until reset negates,
then IRQ5
MODCK[2:3] until reset
negates, then IRQ[6:7]
PULL_SEL
TSIZ[0:1]
RD/WR
BURST
BDIP
TS
Function After HRESET,
PORESET/TRST
Signal Descriptions
2-35