LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 933

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 877. FMSW2 register bit description (FMSW2, address: 0x4008 4034)
Table 878. FMSW3 register bit description (FMSW3, address: 0x4008 4038)
Table 879. Flash module Status register (FMSTAT - 0x4008 4FE0) bit description
Table 880. Flash Module Status Clear register (FMSTATCLR - 0x0x4008 4FE8) bit description
<Document ID>
User manual
Bit
31:0
Bit
31:0
Bit
31:2
2
1:0
Bit
31:2
2
1:0
Symbol
SW2[95:64]
Symbol
SW3[127:96]
Symbol
-
SIG_DONE
-
Symbol
-
SIG_DONE_CLR
-
40.11.1.3 Flash Module Status register (FMSTAT - 0x0x4008 4FE0)
40.11.1.4 Flash Module Status Clear register (FMSTATCLR - 0x0x4008 4FE8)
The read-only FMSTAT register provides a means of determining when signature
generation has completed. Completion of signature generation can be checked by polling
the SIG_DONE bit in FMSTAT. SIG_DONE should be cleared via the FMSTATCLR
register before starting a signature generation operation, otherwise the status might
indicate completion of a previous operation.
The FMSTATCLR register is used to clear the signature generation completion flag.
Description
Word 2 of 128-bit signature (bits 95 to 64).
Description
Word 3 of 128-bit signature (bits 127 to 96).
Description
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
When 1, a previously started signature generation has completed. See
FMSTATCLR register description for clearing this flag.
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
Description
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
Writing a 1 to this bits clears the signature generation completion flag
(SIG_DONE) in the FMSTAT register.
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 40: LPC18xx flash programming interface
UM10430
© NXP B.V. 2011. All rights reserved.
-
-
Reset Value
Reset Value
Reset Value
NA
0
NA
Reset Value
NA
0
NA
933 of 1164