LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 480

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
22.6 Register description
Table 402. Register overview: Ethernet MAC and DMA (base address 0x4001 0000)
<Document ID>
User manual
Name
MAC_CONFIG
MAC_FRAME_FILTER
MAC_HASHTABLE_HIGH
MAC_HASHTABLE_LOW
MAC_MII_ADDR
MAC_MII_DATA
MAC_FLOW_CTRL
MAC_VLAN_TAG
MAC_VER
MAC_DEBUG
MAC_RWAKE_FRFLT
MAC_PMT_CTRL_STAT
-
MAC_INTR
MAC_INTR_MASK
MAC_ADDR0_HIGH
MAC_ADDR0_LOW
-
MAC_TIMESTP_CTRL
-
DMA_BUS_MODE
DMA_TRANS_POLL_DEMAND
DMA_REC_POLL_DEMAND
DMA_REC_DES_ADDR
DMA_TRANS_DES_ADDR
DMA_STAT
DMA_OP_MODE
DMA_INT_EN
DMA_MFRM_BUFOF
DMA_REC_INT_WDT
-
DMA_CURHOST_TRANS_DES
DMA_CURHOST_REC_DES
Access
-
-
-
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Address
offset
0x0000
0x0004
0x0008
0x000C
0x0010
0x0014
0x0018
0x001C
0x0020
0x0024
0x0028
0x002C
0x0030 -
0x0034
0x0038
0x003C
0x0040
0x0044
0x0048 -
0x06FC
0x0700
0x0704 -
0x0FFC
0x1000
0x1004
0x1008
0x100C
0x1010
0x1014
0x1018
0x101C
0x1020
0x1024
0x1028 -
0x1044
0x1048
0x104C
MAC frame filter
Hash table high register
Hash table low register
Version register
Debug register
PMT control and status
Interrupt mask register
Bus Mode Register
Transmit poll demand register
Receive poll demand register
Operation mode register
Description
MAC configuration register
MII address register
MII data register
Flow control register
VLAN tag register
Remote wake-up frame filter
Reserved
Interrupt status register
MAC address 0 high register
MAC address 0 low register
Reserved
Time stamp control register
Reserved
Receive descriptor list address register
Transmit descriptor list address register 0x0000 0000
Status register
Interrupt enable register
Missed frame and buffer overflow
register
Receive interrupt watchdog timer
register
Reserved
Current host transmit descriptor register 0x0000 0000
Current host receive descriptor register 0x0000 0000
Chapter 22: LPC18xx Ethernet
UM10430
© NXP B.V. 2011. All rights reserved.
Reset value
0x0000 8000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 1036
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x8000 FFFF
0xFFFF FFFF
-
0x0000 2000
0x0002 0100
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
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