LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 74

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
9.6.2 Crystal oscillator control register
Table 49.
The register XTAL_OSC_CONTROL contains the control bits for the crystal oscillator.
Table 50.
Bit
8:0
22:9
23
28:24
31:29
Bit
0
Symbol
ENABLE
Symbol
RCNT
FCNT
MEAS
CLK_SEL
-
FREQ_MON register (FREQ_MON, address 0x4005 0014) bit description
XTAL_OSC_CTRL register (XTAL_OSC_CTRL, address 0x4005 0018) bit
description
All information provided in this document is subject to legal disclaimers.
Value Description
0
1
Value
0
1
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
Rev. 00.13 — 20 July 2011
Oscillator-pad enable. Do not change the BYPASS
and ENABLE bits in one write-action: this will result
in unstable device operation!
Enable
Power-down (default)
Description
9-bit reference clock-counter value
14-bit selected clock-counter value
Measure frequency
RCNT and FCNT disabled
Frequency counters started
Clock-source selection for the clock to be
measured. All other values are reserved.
32 kHz oscillator (default)
ENET_RX_CLK
ENET_TX_CLK
GP_CLKIN
Reserved
Crystal oscillator
PLL0 (USB)
PLL0 (audio)
PLL1
Reserved
Reserved
IDIVA
IDIVB
IDIVC
IDIVD
IDIVE
Reserved
IRC
Chapter 9: LPC18xx Clock Generation Unit (CGU)
UM10430
Reset
value
0
0
0
0
-
© NXP B.V. 2011. All rights reserved.
Reset
value
1
Access
R/W
R
R/W
R/W
-
Access
R/W
74 of 1164