LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 603

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
Table 512. SCT conflict resolution register (RES - address 0x4000 0058) bit description
Bit
5:4
7:6
9:8
11:
10
13:
12
15:
14
17:
16
19:
18
Symbol
O2RES
O3RES
O4RES
O5RES
O6RES
O7RES
O8RES
O9RES
All information provided in this document is subject to legal disclaimers.
Value Description
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
Rev. 00.13 — 20 July 2011
Effect of simultaneous set and clear on output 2.
No change.
Set output (or clear based on the SETCLR2 field).
Clear output n (or set based on the SETCLR2 field).
Toggle output.
Effect of simultaneous set and clear on output 3.
No change.
Set output (or clear based on the SETCLR3 field).
Clear output (or set based on the SETCLR3 field).
Toggle output.
Effect of simultaneous set and clear on output 4.
No change.
Set output (or clear based on the SETCLR4 field).
Clear output (or set based on the SETCLR4 field).
Toggle output.
Effect of simultaneous set and clear on output 5.
No change.
Set output (or clear based on the SETCLR5 field).
Clear output (or set based on the SETCLR5 field).
Toggle output.
Effect of simultaneous set and clear on output 6.
No change.
Set output (or clear based on the SETCLR6 field).
Clear output (or set based on the SETCLR6 field).
Toggle output.
Effect of simultaneous set and clear on output 7.
No change.
Set output (or clear based on the SETCLR7 field).
Clear output (or set based on the SETCLR7 field).
Toggle output.
Effect of simultaneous set and clear on output 8.
No change.
Set output (or clear based on the SETCLR8 field).
Clear output (or set based on the SETCLR8 field).
Toggle output.
Effect of simultaneous set and clear on output 9.
No change.
Set output (or clear based on the SETCLR9 field).
Clear output (or set based on the SETCLR9 field).
Toggle output.
Chapter 24: LPC18xx State Configurable Timer (SCT)
UM10430
© NXP B.V. 2011. All rights reserved.
603 of 1164
Reset
value
0
0
0
0
0
0
0
0