LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 539

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
Table 447. Receive descriptor fields 4 (RDES4)
RDES6 and RDES7 contain the snapshot of the time-stamp. The availability of the
snapshot of the time-stamp in RDES6 and RDES7 is indicated by bit-7 in the RDES0
descriptor. The contents of RDES6 and RDES7 are identified in
Table 448. Receive descriptor fields 6 (RDES6)
Table 449. Receive descriptor fields 7 (RDES7)
Bit
6
7
11:8
Bit
31:0
Bit
31:0
Symbol
RTSL
Symbol
RTSH
Symbol
IPv4
IPv6
MT
All information provided in this document is subject to legal disclaimers.
Description
Receive Frame Timestamp Low
This field is updated by DMA with the least significant 32 bits of the timestamp
captured for the corresponding receive frame. This field is updated by DMA
only for the last descriptor of the receive frame which is indicated by Last
Descriptor status bit (RDES0[8]).
Description
Receive Frame Timestamp High
This field is updated by DMA with the most significant 32 bits of the timestamp
captured for the corresponding receive frame. This field is updated by DMA
only for the last descriptor of the receive frame which is indicated by Last
Descriptor status bit (RDES0[8]).
Description
IPv4 Packet Received
When set, this bit indicates that the received packet is an IPv4 packet.
IPv6 Packet Received
When set, this bit indicates that the received packet is an IPv6 packet.
Message Type These bits are encoded to give the type of the message
received.
• 0000: No PTP message received
• 0001: SYNC (all clock types)
• 0010: Follow_Up (all clock types)
• 0011: Delay_Req (all clock types)
• 0100: Delay_Resp (all clock types)
• 0101: Pdelay_Req (in peer-to-peer transparent clock)
• 0110: Pdelay_Resp (in peer-to-peer transparent clock)
• 0111: Pdelay_Resp_Follow_Up (in peer-to-peer transparent clock) • 1000:
Announce
• 1001: Management
• 1010: Signaling
• 1011-1110: Reserved
• 1111: PTP packet with Reserved message type
These bits are valid only when you select the Advance Timestamp feature.
Rev. 00.13 — 20 July 2011
Chapter 22: LPC18xx Ethernet
Table 448
UM10430
© NXP B.V. 2011. All rights reserved.
and
Table
539 of 1164
449.