LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1039
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LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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NXP Semiconductors
Table 963. Pin description
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
42.7 LPC1850/30/20/10 Rev ‘-’ SCU
<Document ID>
User manual
Symbol
VSSIO
Pins not connected
-
I = input; O = output; IA = inactive; PU = pull-up enabled; PD = pull-down enabled; F = floating.
Digital I/O pin. Not 5 V tolerant.
Digital I/O pin. 5 V tolerant.
Digital high-speed I/O pin.
5 V tolerant analog I/O pin.
3.3 V tolerant analog I/O pin.
5 V tolerant USB I/O pin.
I
Reset input pin; <tbd>.
2
C-bus 5 V tolerant open-drain pin.
42.7.1 How to read this chapter
42.7.2 Basic configuration
G6;
J8;
J9;
K9;
K10;
P7;
M13;
P13;
D13;
G8;
H8;
G7;
C4;
H9
B9
The following peripherals are not available on all parts:
For peripherals not available, the corresponding functions are reserved in the SFSP
registers.
The SCU is configured as follows:
•
•
•
•
•
…continued
Ethernet: available on LPC1850/30.
USB0: available on LPC1850/30/20.
USB1: available on LPC1850/30.
See
The SCU is reset by the SCU_RST (reset # 9).
Reset
state
[1]
-
-
Table 901
Type Description
-
-
All information provided in this document is subject to legal disclaimers.
Ground
n.c.
for clocking and power control.
Rev. 00.13 — 20 July 2011
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
1039 of 1164
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