LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1094

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LPC1837FET256,551

Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1837FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293795551
NXP Semiconductors
<Document ID>
User manual
42.10.6.2.4 IF1 and IF2 message buffer registers
Table 1027.CAN message interface command mask registers read direction (IF1_CMDMSK,
The bits of the Message Buffer registers mirror the Message Objects in the Message
RAM.
Bit
2
3
4
5
6
7
31:8
Symbol
NEWDAT
CLRINTPND
CTRL
ARB
MASK
WR_RD
-
address 0x400E 2024 and IF2_CMDMSK, address 0x400E 2084) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Value Description
1
0
1
0
1
0
1
0
1
0
0
-
Access new data bit
Clear NEWDAT bit in the message object.
NEWDAT bit remains unchanged.
Remark: A read access to a message object
can be combined with the reset of the control
bits INTPND and NEWDAT in IF1/2_MCTRL.
The values of these bits transferred to the IFx
Message Control Register always reflect the
status before resetting these bits.
Clear interrupt pending bit.
Clear INTPND bit in the message object.
INTPND bit remains unchanged.
Access control bits
Transfer control bits to IFx message buffer.
Control bits unchanged.
Access arbitration bits
Transfer Identifier, DIR, XTD, and MSGVAL
bits to IFx message buffer register.
Arbitration bits unchanged.
Access mask bits
Transfer Identifier MASK + MDIR + MXTD to
IFx message buffer register.
Mask bits unchanged.
Read transfer
Transfer data from the message object
addressed by the command request register
to the selected message buffer registers
CANIFn_CMDREQ.
reserved
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0
0
0
0
0
0
0
1094 of 1164
Access
R/W
R/W
R/W
R/W
-
R/W
R/W

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