LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1101

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LPC1837FET256,551

Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1837FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293795551
NXP Semiconductors
<Document ID>
User manual
42.10.6.3.5 CAN interrupt pending 1 register
42.10.6.3.6 CAN interrupt pending 2 register
Table 1040.CAN new data 2 register (ND2, address 0x400E 2124) bit description
This register contains the INTPND bits of message objects 16 to 1. By reading out the
INTPND bits, the CPU can check for which Message Object an interrupt is pending. The
INTPND bit of a specific Message Object can be set/reset by the CPU via the IFx
Message Interface Registers or by the Message Handler after reception or after a
successful transmission of a frame. This will also affect the value of INTPND in the
Interrupt Register.
Table 1041.CAN interrupt pending 1 register (IR1, address 0x400E 2140) bit description
This register contains the INTPND bits of message objects 32 to 17. By reading out the
INTPND bits, the CPU can check for which Message Object an interrupt is pending. The
INTPND bit of a specific Message Object can be set/reset by the CPU via the IFx
Message Interface Registers or by the Message Handler after reception or after a
successful transmission of a frame. This will also affect the value of INTPND in the
Interrupt Register.
Table 1042.CAN interrupt pending 2 register (IR2, addresses 0x400E 2144) bit description
Bit
15:0
31:16
Bit
15:0
31:16 -
Bit
15:0
31:16 -
Symbol
INTPND16_1
Symbol
INTPND32_17 Interrupt pending bits of message objects 32 to 17.
Symbol
NEWDAT32_17
-
All information provided in this document is subject to legal disclaimers.
Description
Interrupt pending bits of message objects 16 to 1.
0 = This message object is ignored by the message
handler.
1 = This message object is the source of an interrupt.
Reserved
Description
0 = This message object is ignored by the message
handler.
1 = This message object is the source of an interrupt.
Reserved
Rev. 00.13 — 20 July 2011
Description
New data bits of message objects 32 to 17.
0 = No new data has been written into the data
portion of this Message Object by the Message
Handler since last time this flag was cleared by the
CPU.
1 = The Message Handler or the CPU has written
new data into the data portion of this Message
Object.
Reserved
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0x00
-
Reset
value
0x00
-
Reset
value
0x00
-
1101 of 1164
Access
R
-
Access
R
-
Access
R
-

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