LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 90

no-image

LPC1837FET256,551

Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1837FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293795551
NXP Semiconductors
9.7 Functional description
<Document ID>
User manual
9.7.4.1 Features
9.7.1 32 kHz oscillator
9.7.2 IRC
9.7.3 Crystal oscillator
9.7.4 PLL0 (for USB and audio)
Table 71.
The 32 kHz oscillator output is controlled by the CREG block (see
and the Alarm timer are connected directly to the 32 kHz oscillator.
The IRC is a trimmed 12 MHz internal oscillator. Although it's part of the CGU, the CGU
has no control over this clock source. The IRC is put into power down depending on the
power saving mode.
The crystal oscillator is controlled by the XTAL_OSC_CTRL register in the CGU (see
Table
Bit
27:24
31:28
Input frequency: 14 kHz to 150 MHz. The input from an external crystal is limited to
25 MHz.
CCO frequency: 275 MHz to 550 MHz.
50).
Symbol
CLK_SEL
-
Output stage 26 to 27 control register (OUTCLK_26_CTRL to OUTCLK_27_CTRL,
addresses 0x4005 00C4 to 0x4005 00C8) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Value
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0C
0x0D
0x0E
0x0F
0x10
Description
Clock-source selection.
32 kHz oscillator
ENET_RX_CLK
ENET_TX_CLK
GP_CLKIN
Reserved
Crystal oscillator
PLL0 (for USB)
PLL0 (for audio)
PLL1
IDIVA
IDIVB
IDIVC
IDIVD
IDIVE
Reserved
IRC (default)
Chapter 9: LPC18xx Clock Generation Unit (CGU)
…continued
Table
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0x01
-
31). The RTC
Access
R/W
-
90 of 1164

Related parts for LPC1837FET256,551