IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 94

• Manufacturer Part Number: IPSR-VIDEO
• Description: RENEWAL Of IPS-VIDEO
• Manufacturer: Altera
• Series: IP Suitesr

Specifications of IPSR-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Features: Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

5–14
Table 5–9. Resolution Detection Sequence for a 1080i Incoming Video Stream
Video and Image Processing Suite User Guide
00000000000
00000101000
00100101000
00100111000
00110111000
00111111000
10111111000
Status
Generator Lock
Interrupt
000
000
100
100
100
100
110
If the MegaCore function has not yet determined the format of the incoming video, it
uses the values specified under the Avalon-ST Video Initial/Default Control Packet
section in the parameter editor.
After determining an aspect of the incoming videos format, the MegaCore function
enters the value in the respective register, sets the registers valid bit in the Status
register, and triggers the respective interrupts.
Table 5–9
Interrupts
The Clocked Video Input MegaCore function outputs a single interrupt line which is
the OR of the following internal interrupts:
■
■
Both interrupts can be independently enabled using bits [2:1] of the Control register.
Their values can be read using bits [2:1] of the Interrupt register and a write of 1 to
either of those bits clears the respective interrupt.
Generator lock (Genlock) is the technique for locking the timing of video outputs to a
reference source. Sources that are locked to the same reference can be switched
between cleanly, on a frame boundary. The Genlock functionality is enabled using the
Control register.
The status update interrupt—Triggers when a change of resolution in the
incoming video is detected.
Stable video interrupt—Triggers when the incoming video is detected as stable
(has a consistent sample length in two of the last three lines) or unstable (if, for
example, the video cable is removed). The incoming video is always detected as
unstable when the vid_locked signal is low.
Sample
Active
Count
1,920
1,920
1,920
1,920
1,920
1,920
0
shows the sequence for a 1080i incoming video stream.
Active
Count
Line
540
540
540
540
F0
0
0
0
Active
Count
Line
540
540
F1
0
0
0
0
0
Sample
Count
2,200
2,200
2,200
2,200
2,200
2,200
Total
0
F0 Total
Sample
Count
563
563
563
563
0
0
0
F1 Total
Sample
Count
562
562
0
0
0
0
0
Start of incoming video.
End of first line of video.
Stable bit set and interrupt fired
—Two of last three lines had
the same sample count.
End of first field of video.
Interlaced bit set—Start of
second field of video.
End of second field of video.
Resolution valid bit set and
interrupt fired.
Chapter 5: Functional Descriptions
January 2011 Altera Corporation
Description
Clocked Video Input