IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 127

RENEWAL Of IPS-VIDEO

IPSR-VIDEO

Manufacturer Part Number
IPSR-VIDEO
Description
RENEWAL Of IPS-VIDEO
Manufacturer
Altera
Series
IP Suitesr
Datasheet

Specifications of IPSR-VIDEO

Software Application
IP CORE, SUITES
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Features
Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
Chapter 5: Functional Descriptions
Frame Buffer
January 2011 Altera Corporation
Figure 5–24
Figure 5–24. Frame Buffer Block Diagram
When double-buffering is in use, two frame buffers are used in external RAM. At any
time, one buffer is used by the writer component to store input pixels, while the
second buffer is locked by the reader component that reads the output pixels from the
memory.
When both the writer and the reader components have finished processing a frame,
the buffers are exchanged. The frame that has just been input can then be read back
from the memory and sent to the output, while the buffer that has just been used to
create the output can be overwritten with fresh input.
A double-buffer is typically used when the frame rate is the same both at the input
and at the output sides but the pixel rate is highly irregular at one or both sides.
A double-buffer is often used when a frame has to be received or sent in a short period
of time compared with the overall frame rate. For example, after the Clipper
MegaCore function or before one of the foreground layers of the Alpha Blending
Mixer MegaCore function.
When triple-buffering is in use, three frame buffers are used in external RAM. As was
the case in double-buffering, the reader and the writer components are always locking
one buffer to respectively store input pixels to memory and read output pixels from
memory. The third frame buffer is a spare buffer that allows the input and the output
sides to swap buffers asynchronously. The spare buffer is considered clean if it
contains a fresh frame that has not been output, or dirty if it contains an old frame that
has already been sent by the reader component.
When the writer has finished storing a frame in memory, it swaps its buffer with the
spare buffer if the spare buffer is dirty. The buffer locked by the writer component
becomes the new spare buffer and is clean because it contains a fresh frame. If the
spare buffer is already clean when the writer has finished writing the current input
frame and if dropping frames is allowed, then the writer drops the frame that has just
been received and overwrites its buffer with the next incoming frame. If dropping
frames is not allowed, the writer component stalls until the reader component has
finished its frame and replaced the spare buffer with a dirty buffer.
shows a simple block diagram of the Frame Buffer MegaCore function.
Avalon-ST Input
(din)
Avalon-MM Master
(write_master)
Memory
Writer
Arbitration Logic
DDR2
Memory
Reader
Avalon-MM Master
(read_master)
Video and Image Processing Suite User Guide
Avalon-ST Output
(dout)
5–47

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