IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 51

• Manufacturer Part Number: IPSR-VIDEO
• Description: RENEWAL Of IPS-VIDEO
• Manufacturer: Altera
• Series: IP Suitesr

Specifications of IPSR-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Features: Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Chapter 3: Parameter Settings
Frame Buffer
Table 3–14. Frame Buffer Parameter Settings (Part 2 of 2)
January 2011 Altera Corporation
Drop invalid fields/frames
Run-time control for the writer thread On or Off
Run-time control for the reader
thread
Support for locked frame rate
conversion (1),
Support for interlaced streams
Number of packets buffered per
frame
Maximum packet length
Use separate clocks for the Avalon-
MM master interfaces
External memory port width
Write-only master interface FIFO
depth
Write-only master interface burst
target
Read-only master interface FIFO
depth
Read-only master interface burst
target
Base address of frame buffers
Align read/write bursts with burst
boundaries
Notes to
(1) Locked frame rate conversion cannot be turned on until dropping and repeating are allowed.
(2) Locked frame rate conversion cannot be turned on if the run-time control interface for the writer component has not been enabled.
(3) The Maximum packet length option is not available when the Number of packets buffered per frame is set to 0.
(4) The number of frame buffers and the total memory required at the specified base address is displayed under the base address.
(3)
Table
Parameter
3–14:
(2)
(4)
On or Off
On or Off
On or Off
0–32
10–1,024
On or Off
16–1,024,
Default = 64
2–256, Default = 32
16–1,024,
Default = 64
2–256, Default = 32
Any 32-bit value,
Default = 0x00000000
On or Off
On or Off
16, 32, 64, 128, 256
Value
Turn on to drop image data packets whose length is not
compatible with the dimensions declared in the last control
packet.
Turn on to enable run-time control for the write interfaces.
Turn on to enable run-time control for the read interfaces.
Turn on to synchronize the input and output frame rates
through an Avalon-MM slave interface.
Turn on to support consistent dropping and repeating of
fields in an interlaced video stream. This option should not
be turned on for double-buffering of an interlaced input
stream on a field-by-field basis.
Specify the maximum number of non-image, non-control,
Avalon-ST Video packets that can be buffered with each
frame. Older packets are discarded first in case of an
overflow.
Specify the maximum packet length as a number of
symbols. The minimum value is 10 because this is the size
of an Avalon-ST control packet (header included). Extra
samples are discarded if packets are larger than allowed.
Turn on to add a separate clock signal for the Avalon-MM
master interfaces so that they can run at a different speed
to the Avalon-ST processing. This decouples the memory
speed from the speed of the data path and is sometimes
necessary to reach performance target.
Choose the width of the external memory port.
Choose the FIFO depth of the write-only Avalon-MM
interface.
Choose the burst target for the write-only Avalon-MM
interface.
Choose the FIFO depth of the read-only Avalon-MM
interface.
Choose the burst target for the read-only Avalon-MM
interface.
Hexadecimal address of the frame buffers in external
memory.
Turn on to avoid initiating read and write bursts at a
position that would cause the crossing of a memory row
boundary.
Video and Image Processing Suite User Guide
Description
3–15