IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 146

• Manufacturer Part Number: IPSR-VIDEO
• Description: RENEWAL Of IPS-VIDEO
• Manufacturer: Altera
• Series: IP Suitesr

Specifications of IPSR-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Features: Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

5–66
Table 5–27. Test Pattern Generator Avalon-ST Video Protocol Parameters (Part 2 of 2)
Stall Behavior and Error Recovery
Video and Image Processing Suite User Guide
Color Pattern
Notes to
(1) 4:2:2 and 4:2:0 subsampling are not available for the RGB color space.
(2) Vertical subsampling and interlacing cannot be used when the height of the output is not even. The GUI does not allow such a parameterization
(3) Vertical subsampling and interlacing are incompatible with each other and cannot be selected simultaneously in the GUI.
and the behavior of the MegaCore function is undefined if the height is subsequently set to an odd value through the run-time control.
Parameter
Table
5–27:
The Video and Image Processing Suite MegaCore functions do not continuously
process data. Instead, they use flow-controlled Avalon-ST interfaces, which allow
them to stall the data while they perform internal calculations.
During control packet processing, the MegaCore functions might stall frequently and
read/write less than once per clock cycle. During data processing, the MegaCore
functions generally process one input/output per clock cycle. There are, however,
some stalling cycles. Typically, these are for internal calculations between rows of
image data and between frames/fields.
When stalled, the MegaCore function signals that it is not ready to receive or produce
data. The time spent in the stalled state varies between MegaCore functions and their
parameterizations. In general, it is a few cycles between rows and a few more between
frames. Details of exceptions to this behavior and details of stalling due to internal
buffering are given for each MegaCore function in the following sections.
If data is not available at the input when required, all of the MegaCore functions stall,
and thus do not output data. With the exceptions of the Deinterlacer and Frame Buffer
in double or triple-buffering mode, none of the MegaCore functions ever overlap the
processing of consecutive frames. The first sample of frame F + 1 is not input until
after the last sample of frame F has been output.
The following sections give bounds and guidelines describing the stalling and
throughput of the MegaCore functions but do not attempt to specify precise behavior
down to the last clock cycle. When an endofpacket signal is received unexpectedly
(early or late), the MegaCore function recovers from the error and prepares itself for
the next valid packet (control or data). The following sectiosn describe the time taken
to do this is described in each of the following sections.
For RGB sequential data:
For 4:4:4 sequential data:
For 4:2:0 sequential data:
For 4:4:4 parallel data:
Cb
B
Y
Cb
Cr
Cr
Cb
G
Cr
Y
Y
Y
R
Value
For RGB parallel data:
For 4:2:2 sequential data:
For 4:2:2 parallel data:
For 4:2:0 parallel data:
Chapter 5: Functional Descriptions
January 2011 Altera Corporation
Stall Behavior and Error Recovery
Cb
Cb Cr
Y
Y
Cb
R
G
B
Y
Y
Cr
Cr
Y
Y