IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 18

• Manufacturer Part Number: IPSR-VIDEO
• Description: RENEWAL Of IPS-VIDEO
• Manufacturer: Altera
• Series: IP Suitesr

Specifications of IPSR-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Features: Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

1–10
Table 1–8. Clipper Performance (Part 2 of 2)
Table 1–9. Clocked Video Input Performance
Table 1–10. Clocked Video Output Performance (Part 1 of 2)
Video and Image Processing Suite User Guide
Notes to
(1) EP4CGX15BF14C6 devices.
(2) 5SGXEA7H3F35C3 devices.
Converts DVI 1080p60 clocked video to Avalon-ST Video.
Converts PAL clocked video to Avalon-ST Video.
Converts SDI 1080i60 clocked video to Avalon-ST Video.
Converts SDI 1080p60 clocked video to Avalon-ST Video.
Notes to
(1) EP4CGX15BF14C6 devices.
(2) 5SGXEA7H3F35C3 devices.
Converts Avalon-ST Video to DVI 1080p60 clocked video.
Converts Avalon-ST Video to PAL clocked video.
Cyclone IV GX
Cyclone IV GX
Cyclone IV GX
Cyclone IV GX
Cyclone IV GX
Cyclone IV GX
Device Family
Device Family
Device Family
Stratix V
Stratix V
Stratix V
Stratix V
Stratix V
Stratix V
Table
Table
Clocked Video Input
Clocked Video Output
(2)
(2)
(2)
(2)
(2)
(2)
1–8:
1–9:
(1)
(1)
(1)
(1)
(1)
(1)
Combinational
Combinational
Combinational
Table 1–9
Table 1–10
LUTs/ALUTs
LUTs/ALUTs
LUTs/ALUTs
577
470
377
296
361
297
403
322
395
310
276
188
shows the performance figures for the Clocked Video Input.
shows the performance figures for the Clocked Video Output.
Registers
Registers
Registers
Logic
Logic
Logic
697
446
483
376
461
353
552
426
549
426
292
148
ALUTs
ALUTs
Bits
—
—
—
—
—
—
—
—
—
—
—
—
Memory
M9K
M9K
M9K
—
—
—
—
—
—
—
—
—
—
—
—
Memory
Memory
Chapter 1: About This MegaCore Function Suite
51,200
51,200
18,432
18,432
43,008
43,008
43,008
43,008
51,200
51,200
(9x9)
Bits
Bits
—
—
DSP Blocks
Performance and Resource Utilization
January 2011 Altera Corporation
MLAB Bits
MLAB Bits
(18x18)
—
—
—
—
—
—
—
40
—
40
—
—
207.04
334.56
133.24
206.57
134.88
225.17
116.36
194.36
283.61
198.61
138.81
199.24
(MHz)
(MHz)
(MHz)
f
f
f
MAX
MAX
MAX