IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 57

RENEWAL Of IPS-VIDEO

IPSR-VIDEO

Manufacturer Part Number
IPSR-VIDEO
Description
RENEWAL Of IPS-VIDEO
Manufacturer
Altera
Series
IP Suitesr
Datasheet

Specifications of IPSR-VIDEO

Software Application
IP CORE, SUITES
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Features
Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
Chapter 3: Parameter Settings
Switch
Table 3–21. Scaler II Parameter Settings Tab
Switch
Table 3–22. Switch Parameter Settings (Part 1 of 2)
January 2011 Altera Corporation
Precision Settings
Vertical coefficients
signed
Vertical coefficient integer
bits
Vertical coefficient
fraction bits
Horizontal coefficients
signed
Horizontal coefficient
integer bits
Horizontal coefficient
fraction bits
Fractional bits preserved
Coefficient Settings
Vertical coefficient banks
Horizontal coefficient
banks
Pipelining
Add extra pipelining
registers
Bits per pixel per color plane 4–20, Default = 8 Choose the number of bits per pixel (per color plane).
Number of color planes
Color planes are in parallel
Number of input ports
Parameter
Parameter
1
The Scaler II MegaCore function currently does not offer the nearest neighbor and
bicubic scaling modes, and the symmetric coefficient functionality is disabled for both
horizontal and vertical coefficients. You must specify the coefficients at run time for
version 10.1. However, you can achieve bicubic scaling by setting the horizontal and
vertical taps to 4 and load bicubic coefficients through the Avalon-MM control port.
Table 3–22
On or Off
0–32, Default = 1
1–32, Default = 7
On or Off
0–32, Default = 1
1–32, Default = 7
Default = 0
1–32, Default = 1
1–32, Default = 1
On or Off
1–3, Default = 3
On or Off
1–12, Default = 2 Number of input ports (din and alpha_in).
shows the Switch MegaCore function parameters.
Value
Value
Choose the number of color planes.
Turn on to set colors planes in parallel, turn off to set colors planes in
sequence.
Turn on to force the algorithm to use signed vertical coefficient
data.
Choose the number of integer bits for each vertical coefficient.
Choose the number of fraction bits for each vertical coefficient.
Turn on to force the algorithm to use signed horizontal coefficient
data.
Choose the number of integer bits for each horizontal coefficient.
Choose the number of fraction bits for each horizontal coefficient.
Choose the number of fractional bits you want to preserve
between the horizontal and vertical filtering for the bicubic and
polyphase algorithms.
Choose the number of banks of vertical filter coefficients for the
bicubic and polyphase algorithms.
Choose the number of banks of horizontal filter coefficients for the
bicubic and polyphase algorithms.
Turn on to add extra pipeline stage registers to the data path.
You may need to turn on this option to achieve a frequency of
150 MHz for Cyclone III or Cyclone IV devices, and frequencies
above 250 MHz for Arria II, Stratix IV, and Stratix V devices.
Description
Description
Video and Image Processing Suite User Guide
3–21

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