IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 75

• Manufacturer Part Number: IPSR-VIDEO
• Description: RENEWAL Of IPS-VIDEO
• Manufacturer: Altera
• Series: IP Suitesr

Specifications of IPSR-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Features: Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Chapter 4: Interfaces
Avalon-MM Slave Interfaces
Figure 4–14. Example of Control Packet Transfer
Avalon-MM Slave Interfaces
January 2011 Altera Corporation
CbCr din_data(13:10)
din_startofpacket
din_endofpacket
Y din_data(3:0)
din_valid
1
clock
Example 1 uses the start of packet and end of packet lines in exactly the same way.
The Video and Image Processing Suite MegaCore functions that permit run-time
control of some aspects of their behavior, use a common type of Avalon-MM slave
interface for this purpose.
Each slave interface provides access to a set of control registers which must be set by
external hardware. You should assume that these registers power up in an undefined
state. The set of available control registers and the width in binary bits of each register
varies with each control interface.
For a description of the control registers for each individual MegaCore function, refer
to
The first two registers of every control interface perform the following two functions
(the others vary with each control interface):
■
Chapter 7, Control Register
Register 0 is the Go register. Bit zero of this register is the Go bit, the function does
not use all other bits. A few cycles after the function comes out of reset, it writes a
zero in the Go bit (remember that all registers in Avalon-MM control slaves power
up in an undefined state).
Although there are a few exceptions, most Video and Image Processing Suite
MegaCore functions stop at the beginning of an image data packet if the Go bit is
set to 0. This allows you to stop the MegaCore function and to program run-time
control data before the processing of the image data begins. A few cycles after the
Go bit is set by external logic connected to the control port, the MegaCore function
begins processing image data. If the Go bit is unset while data is being processed,
then the MegaCore function stops processing data again at the beginning of the
next image data packet and waits until the Go bit is set by external logic.
0xF
720(0x02D0)
0x0
0x2
0xD
0x0
240(0x00F0)
0x0
0x0
Maps.
0xF
0x0
10xx
if0
Video and Image Processing Suite User Guide
binary
f0 - 10xx
f1 - 11xx
p - 00xx
0x0
image data
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