IPR-SDRAM/DDR2 Altera, IPR-SDRAM/DDR2 Datasheet - Page 19

• Manufacturer Part Number: IPR-SDRAM/DDR2
• Description: IP CORE Renewal Of IP-SDRAM/DDR2
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-SDRAM/DDR2

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Cyclone, HardCopy, Stratix
• Features: Data Mask Signals For Partial Write Operations, Bank Management Architecture
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone, HardCopy, Stratix
• Rohs Compliant: NA
• Function: DDR2 SDRAM Controller
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 2: Getting Started
MegaWizard Plug-In Manager Design Flow
DDR & DDR2 SDRAM Controller Walkthrough
© March 2009 Altera Corporation
2. Use the IP Toolbench-generated IP functional simulation model to verify the
3. Use the Quartus II software to edit the PLL(s), add constraints to the example
4. Perform gate-level timing simulation, or if you have a suitable development
5. Generate a programming file for the Altera device(s) on your board.
6. Program the Altera device(s) with the completed design.
The DDR and DDR2 SDRAM Controller Compiler with MegaWizard Plug-In flow
option allows you to fully specify a DDR or DDR2 SDRAM controller. With this flow,
you design to a low-level interface.
If you are not using SOPC Builder, this walkthrough explains how to create a custom
variation of the DDR or DDR2 SDRAM Controller MegaCore function using the
Altera DDR and DDR2 SDRAM Controller IP Toolbench and the Quartus II software.
As you go through the wizard, each step is described in detail.
For more information on using HardCopy II devices, refer to
II Design
This walkthrough requires the following steps:
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Create a New Quartus II Project
You need to create a new Quartus II project with the New Project Wizard, which
specifies the working directory for the project, assigns the project name, and
designates the name of the top-level design entity. To create a new project follow
these steps:
1. Choose Programs > Altera > Quartus II <version> (Windows Start menu) to run
2. Choose New Project Wizard (File menu).
3. Click Next in the New Project Wizard: Introduction page (the introduction page
operation of the example design and the example driver.
design, compile the example design, and perform post-compilation timing
analysis.
board, you can generate an OpenCore Plus time-limited programming file, which
you can use to verify the operation of the example design in hardware.
“Create a New Quartus II Project” on page 2–9
“Launch IP Toolbench from the MegaWizard Plug-In Manager” on page 2–11
“Parameterize” on page 2–11
“Constraints” on page 2–15
“Set Up Simulation” on page 2–15
“Generate” on page 2–15
the Quartus II software. Alternatively, you can use the Quartus II Web Edition
software.
does not display if you turned it off previously).
Walkthrough.
DDR and DDR2 SDRAM Controller Compiler User Guide
Appendix C, HardCopy
2–9