IPR-RLDRAMII Altera, IPR-RLDRAMII Datasheet

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IPR-RLDRAMII

Manufacturer Part Number
IPR-RLDRAMII
Description
IP CORE Renewal Of IP-RLDRAMII
Manufacturer
Altera
Series
Memory Controllers - SDRAMr
Type
MegaCorer
Datasheets

Specifications of IPR-RLDRAMII

Software Application
IP CORE, Memory Controllers, SDRAM
Tool Function
Intellectual Property (IP) Core
Supported Devices
HardCopy, Stratix
Function
RLDRAM II Controller
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
RLDRAM II
Controller
MegaCore
Function v7.1
Issues
Altera Corporation
ES-RLD003-1.0
May 2007, MegaCore Version 7.1
f
This document addresses known errata and documentation issues for the
RLDRAM II Controller MegaCore
functional defects or errors, which may cause the RLDRAM II Controller
MegaCore function to deviate from published specifications.
Documentation issues include errors, unclear descriptions, or omissions
from current published specifications or product documents.
Table 1
function v7.1.
For the most up-to-date errata for this release, refer to the errata sheet on
the Altera
This section describes the RLDRAM II Controller MegaCore function v7.1
issues.
Error when Upgrading from v7.0 to v7.1
If you upgrade an existing custom variation of the RLDRAM II MegaCore
function to v7.1, the following error occurs:
Error when Upgrading from v7.0 to v7.1
NativeLink Fails with the ModelSim Simulator
Add an RLDRAM II Controller to a Project with Other Memory Controllers
Simulating with the NCSim Software
Simulating with the VCS Simulator
Multiple Instances of the auk_ddr_functions.vhd File
Gate-Level Simulation Filenames
Unpredictable Results for Gate-Level Simulations (HardCopy II Devices
only)
Editing the Custom Variation (non-DQS Mode)
Table 1. RLDRAM II Controller MegaCore Function v7.1 Issues
www.altera.com/literature/es/es_rldram_ii_71.pdf
shows the issues that affect the RLDRAM II Controller MegaCore
®
website:
Issue
RLDRAM II Controller
®
MegaCore Function
function version 7.1. Errata are
Errata Sheet
Page
1
2
3
4
4
5
5
6
7
1

Related parts for IPR-RLDRAMII

IPR-RLDRAMII Summary of contents

Page 1

... Unpredictable Results for Gate-Level Simulations (HardCopy II Devices only) Editing the Custom Variation (non-DQS Mode) f For the most up-to-date errata for this release, refer to the errata sheet on the Altera RLDRAM II This section describes the RLDRAM II Controller MegaCore function v7.1 issues. Controller MegaCore Error when Upgrading from v7 ...

Page 2

... NativeLink Fails with the ModelSim Simulator When using NativeLink to run VHDL gate-level simulations using the ModelSim software, the simulation fails with the following error message Error: (vcom-19) Failed to access library 'altera' at "altera". Affected Configurations The issue affects VHDL gate-level simulations. Design Impact The design does not simulate ...

Page 3

... The following lines need to be added to the NativeLink-generated gate-level simulation script: vlib vhdl_libs/altera vmap altera vhdl_libs/altera vcom -work altera <Quartus installation directory>/libraries/vhdl/altera/altera_europa_support_lib.vhd Solution Status This issue will be fixed in a future version of the RLDRAM II controller. Add an RLDRAM II Controller to a Project with Other Memory ...

Page 4

... This issue affects all configurations. Design Impact The design does not simulate. Workaround For VHDL simulations, in the <variation name>_example_driver.vhd file, change all when statements from: to: 4 RLDRAM II Controller MegaCore Function v7.1 Errata Sheet when std_logic_vector’(“<bit_pattern>”) when “<bit_pattern>” Altera Corporation ...

Page 5

... Affected Configurations This issue affects all configurations. Design Impact You cannot run gate-level simulations. Altera Corporation RLDRAM II Controller MegaCore Function v7.1 Issues II project has multiple instances of the auk_ddr_functions.vhd ® RLDRAM II Controller MegaCore Function v7.1 Errata Sheet ...

Page 6

... Rename <filename>.vho file to <project name>.vho. Rename <filename>.sdo file to <project name>_vhd.sdo. Rename the <filename>.vo file to <project name>.vo. Rename the <filename>.sdo file to <project name>_v.sdo. In the <project name>.vo file change the following line to point to the <project name>_v.sdo file: II ® Altera Corporation ...

Page 7

... Solution Status This issue will be fixed in a future version of the RLDRAM II controller. Contact For more information, contact Altera's mySupport website at www.altera.com/mysupport and click Create New Service Request. Information Choose the Product Related Request form. Altera Corporation IP Toolbench does not reload ...

Page 8

... Revision History Revision History Table 2 MegaCore function v7.1. Table 2. RLDRAM II Controller v7.1 Errata Sheet Revision History Version Date 1.0 May 2007 First release. 8 RLDRAM II Controller MegaCore Function v7.1 Errata Sheet shows the revision history for the RLDRAM II Controller Errata Summary Altera Corporation ...

Page 9

... Copyright © 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U ...

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