IPR-SDRAM/DDR2 Altera, IPR-SDRAM/DDR2 Datasheet - Page 10

• Manufacturer Part Number: IPR-SDRAM/DDR2
• Description: IP CORE Renewal Of IP-SDRAM/DDR2
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-SDRAM/DDR2

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Cyclone, HardCopy, Stratix
• Features: Data Mask Signals For Partial Write Operations, Bank Management Architecture
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone, HardCopy, Stratix
• Rohs Compliant: NA
• Function: DDR2 SDRAM Controller
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

1–6
OpenCore Plus Evaluation
DDR and DDR2 SDRAM Controller Compiler User Guide
f
Figure 1–2
Controller Compiler, where <path> is the installation directory. The default
installation directory on Windows is c:\altera\<version>; on Linux it is
/opt/altera<version>.
Figure 1–2. Directory Structure
With Altera’s free OpenCore Plus evaluation feature, you can perform the following
actions:
■
■
■
■
You only need to purchase a license for the megafunction when you are completely
satisfied with its functionality and performance, and want to take your design to
production.
For more information on OpenCore Plus hardware evaluation using the DDR and
DDR2 SDRAM Controller, refer to
and
Simulate the behavior of a megafunction (Altera MegaCore function or AMPP
megafunction) within your system
Verify the functionality of your design, as well as evaluate its size and speed
quickly and easily
Generate time-limited device programming files for designs that include
MegaCore functions
Program a device and verify your design in hardware
<path>
Installation directory.
AN 320: OpenCore Plus Evaluation of
ip
Contains the Altera MegaCore IP Library and third-party IP cores.
altera
Contains the Altera MegaCore IP Library.
shows the directory structure after you install the DDR and DDR2 SDRAM
common
Contains shared components.
ddr_ddr2_sdram
Contains the DDR and DDR2 SDRAM Controller Compiler files and documentation.
constraints
Contains scripts that generate an instance-specific Tcl script for each instance of the DDR and DDR2
SDRAM Controller Compiler in various Altera devices.
doc
Contains the documentation for the DDR and DDR2 SDRAM Controller Compiler.
lib
Contains encrypted lower-level design files and other support files.
system_timing
Contains system timing analysis scripts and associated files.
dat
Contains a data file for each Altera device combination that is used by the Tcl script to generate the
instance-specific Tcl script.
“OpenCore Plus Time-Out Behavior” on page 3–3
Megafunctions.
Chapter 1: About This Compiler
March 2009 Altera Corporation
Installation and Licensing
SM