UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 902

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
<8> Interframe space
R
D
The interframe space is inserted after a data frame, remote frame, error frame, or overload frame to separate
one frame from the next.
• The bus state differs depending on the error status.
(a) Error active node
(b) Error passive node
Remarks 1. Bus idle: State in which the bus is not used by any node.
Remarks 1. Bus idle:
(Frame)
The interframe space consists of a 3-bit intermission field and a bus idle field.
The interframe space consists of an intermission field, a suspend transmission field, and a bus idle field.
Usually, the intermission field is 3 bits. If the transmitting node detects a dominant level at the third bit of
the intermission field, however, it executes transmission.
R
D
2. D: Dominant = 0
2. D: Dominant = 0
R: Recessive = 1
Suspend transmission: Sequence of 8 recessive-level bits transmitted from the
R: Recessive = 1
(Frame)
Figure 20-14. Interframe Space (Error Passive Node)
Figure 20-13. Interframe Space (Error Active Node)
Intermission
(3 bits)
Intermission
(3 bits)
Interframe space
State in which the bus is not used by any node.
node in the error passive status.
Interframe space
Suspend transmission
(8 bits)
(0 to ∞ bits)
Bus idle
CHAPTER 20 CAN CONTROLLER
(0 to ∞ bits)
(Frame)
Bus idle
(Frame)
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