UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1497
UPD70F3771GF-GAT-AX
Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3771GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
←
GR [ ]
SR [ ]
zero-extend (n)
sign-extend (n)
load-memory (a, b)
store-memory (a, b, c)
load-memory-bit (a, b)
store-memory-bit (a, b, c)
saturated (n)
result
Byte
Halfword
Word
+
–
ll
×
÷
%
AND
OR
XOR
NOT
logically shift left by
logically shift right by
arithmetically shift right by
i
r
l
Register Symbol
(3) Register symbols used in operations
(4) Register symbols used in execution clock
Register Symbol
If executing another instruction immediately after executing the first instruction (issue).
If repeating execution of the same instruction immediately after executing the first instruction (repeat).
If using the results of instruction execution in the instruction immediately after the execution (latency).
Input for
General-purpose register
System register
Expand n with zeros until word length.
Expand n with signs until word length.
Read size b data from address a.
Write data b into address a in size c.
Read bit b of address a.
Write c to bit b of address a.
Execute saturated processing of n (n is a 2’s complement).
If, as a result of calculations,
Reflects the results in a flag.
Byte (8 bits)
Half word (16 bits)
Word (32 bits)
Addition
Subtraction
Bit concatenation
Multiplication
Division
Remainder from division results
Logical product
Logical sum
Exclusive OR
Logical negation
Logical shift left
Logical shift right
Arithmetic shift right
n ≥ 7FFFFFFFH, let it be 7FFFFFFFH.
n ≤ 80000000H, let it be 80000000H.
Explanation
Explanation
APPENDIX D INSTRUCTION SET LIST
Page 1497 of 1509
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