UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 347
UPD70F3771GF-GAT-AX
Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3771GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 347 of 1512
- Download datasheet (9Mb)
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(a) Function as compare register
(b) Function as capture register
The following table shows the functions of the capture/compare register in each mode, and how to write data to the
compare register.
Table 8-4. Function of Capture/Compare Register in Each Mode and How to Write Compare Register
Interval timer
External event counter
External trigger pulse output
One-shot pulse output
PWM output
Free-running timer
Pulse width measurement
Triangular wave PWM mode
The TABnCCR2 register can be rewritten even when the TABnCTL0.TABnCE bit = 1.
The set value of the TABnCCR2 register is transferred to the CCR2 buffer register. When the value of the 16-
bit counter matches the value of the CCR2 buffer register, a compare match interrupt request signal
(INTTABnCC2) is generated. If TOABn2 pin output is enabled at this time, the output of the TOABn2 pin is
inverted.
When the TABnCCR2 register is used as a capture register in the free-running timer mode, the count value of
the 16-bit counter is stored in the TABnCCR2 register if the valid edge of the capture trigger input pin (TIABn2
pin) is detected. In the pulse width measurement mode, the count value of the 16-bit counter is stored in the
TABnCCR2 register and the 16-bit counter is cleared (0000H) if the valid edge of the capture trigger input pin
(TIABn2 pin) is detected.
Even if the capture operation and reading the TABnCCR2 register conflict, the correct value of the TABnCCR2
register can be read.
Remark
Operation Mode
n = 0, 1
Compare register
Compare register
Compare register
Compare register
Compare register
Capture/compare register
Capture register
Compare register
Capture/Compare Register
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
Anytime write
Anytime write
Batch write
Anytime write
Batch write
Anytime write
−
Batch write
How to Write Compare Register
Page 347 of 1509
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