UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1186

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
21.9.1 Initialization processing
returned is written and an endpoint is allocated to an interface. In the interrupt settings, the interrupt sources that do not
have to be checked can be masked by using the UF0IMn register (n = 0 to 4).
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Initialization processing is executed in the following two ways.
• Initialization of request data register
• Setting of interrupt
When a request data register is initialized, data for the GET_XXXX request to which a value is to be automatically
The following flowcharts illustrate the above processing.
Remark
n = 0 to 255
UF0E0NA register = 01H
UF0E0NA register = 00H
Initialization of request
UF0MODC register =
Setting of interface
EP0NKA = 1?
and endpoint
data register
(UF0E0NA)
40H or 00H
START
END
Yes
Figure 21-14. Initializing Request Data Register
:
:
See Figure 21-15 Initialization of Request Data Register.
See Figure21-16 Setting of Interface and Endpoint.
If the total number of bytes of the UF0CIEn register exceeds 256,
set the UF0MODC register to 40H. No data has to be written to
the UF0CIEn register.
Cancels NAK response to Endpoint0.
No
CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
Page 1186 of 1509