UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 840

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
19.6.3 Transfer direction specification
slave device. When the transfer direction specification bit has a value of 1, it indicates that the master device is receiving
data from a slave device.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
In addition to the 7-bit address data, the master device sends 1 bit of data that specifies the transfer direction.
When this transfer direction specification bit has a value of 0, it indicates that the master device is transmitting data to a
Note The INTIICn signal is generated if a local address or extension code is received during slave device
Remark
operation.
n = 0 to 2
INTIICn
SDA0n
SCL0n
Figure 19-10. Transfer Direction Specification
AD6
1
AD5
2
AD4
3
AD3
4
AD2
5
AD1
Transfer direction specification
6
AD0
7
R/W
8
9
CHAPTER 19 I
Note
Page 840 of 1509
2
C BUS

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