UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 484
UPD70F3771GF-GAT-AX
Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3771GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 484 of 1512
- Download datasheet (9Mb)
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(2) Operation timing in external event count mode
(a) Operation if TT0CCR0 register is set to 0000H
(b) Operation if TT0CCR0 register is set to FFFFH
When the TT0CCR0 register is set to 0000H, the 16-bit counter is repeatedly cleared to 0000H and generates
the INTTT0CC0 signal each time it has detected the valid edge of the external event count signal and its value
has matched that of the CCR0 buffer register.
The value of the 16-bit counter is always 0000H.
If the TT0CCR0 register is set to FFFFH, the 16-bit counter counts up to FFFFH each time the valid edge of
the external event count signal has been detected. The 16-bit counter is cleared to 0000H in synchronization
with the next count-up timing, and the INTTT0CC0 signal is generated. At this time, the TT0OPT0.TT0OVF bit
is not set.
INTTT0CC0 signal
INTTT0CC0 signal
TT0CCR0 register
TT0CCR0 register
16-bit counter
16-bit counter
TT0CE bit
TT0CE bit
FFFFH
FFFFH
0000H
0000H
counter counts the valid edge of the external event count input.
External event
count: 10000H
INTTT0CC0 signal is generated each time the 16-bit
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
External event
count: 10000H
FFFFH
0000H
External event
count: 10000H
Page 484 of 1509
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