UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 396

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(f) TABn capture/compare registers 0 to 3 (TABnCCR0 to TABnCCR3)
If D
PWM waveform are as follows.
Remarks 1.
Cycle = (D
Active level width = D
0
is set to the TABnCCR0 register and D
2.
3.
0
+ 1) × Count clock cycle
TABn I/O control register 1 (TABnIOC1) and TABn option register 0 (TABnOPT0) are not
used in the PWM output mode.
Updating TABn capture/compare register 2 (TABnCCR2) and TABn capture/compare register
3 (TABnCCR3) is enabled by writing TABn capture/compare register 1 (TABnCCR1).
n = 0, 1
Figure 8-26. Register Setting in PWM Output Mode (3/3)
k
× Count clock cycle
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
k
to the TABnCCRk register, the cycle and active level of the
Page 396 of 1509