UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 531
UPD70F3771GF-GAT-AX
Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3771GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Note The TT0OVF0 and TT0OVF1 flags are set on the internal RAM by software.
<1> Read the TT0CCR0 register (setting of the default value of the TIT00 pin input).
<2> Read the TT0CCR1 register (setting of the default value of the TIT01 pin input).
<3> An overflow occurs. Nothing is done by software.
<4> Read the TT0CCR0 register.
<5> Read the TT0CCR1 register.
<6> Same as <3>
TT0CCR0 register
TT0CCR1 register
Example when two capture registers are used (without using overflow interrupt)
INTTT0OV signal
TT0OVF0 flag
TT0OVF1 flag
Read the overflow flag. If the overflow flag is 1, set only the TT0OVF1 flag to 1, and clear the
overflow flag to 0.
Because the overflow flag is 1, the pulse width can be calculated by (10000H + D
Read the overflow flag. Because the overflow flag is cleared in <4>, 0 is read.
Read the TT0OVF1 flag. If the TT0OVF1 flag is 1, clear it to 0.
Because the TT0OVF1 flag is 1, the pulse width can be calculated by (10000H + D
(correct).
TIT00 pin input
TIT01 pin input
16-bit counter
TT0OVF bit
TT0CE bit
FFFFH
0000H
Note
Note
D
00
<1>
D
10
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
<2>
D
00
<3>
D
D
01
10
<4>
D
11
<5> <6>
D
01
D
11
01
− D
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− D
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