UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 570

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(n = 0 to 3)
TMnCTL0
After reset: 00H
Cautions 1. Set the TMnCKS2 to TMnCKS0 bits when the TMnCE bit = 0.
Remark
(m = 1 to 3)
TMmCKS2
TMmCKS2
(m = 0)
TMnCE
Internal clock control and internal circuit reset for TMMn are performed asynchronously
using the TMnCE bit. When the TMnCE bit is cleared to 0, the internal clock of TMMn
is disabled (fixed to low level) and 16-bit counter is reset asynchronously.
TMnCE
<7>
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2. Be sure to clear bits 3 to 6 to “0”.
f
f
f
XX
R
XT
R/W
TMMn operation disabled (16-bit counter reset asynchronously).
Operation clock application stopped.
TMMn operation enabled. Operation clock application started. TMMn
operation started.
: Internal oscillation clock frequency
TMmCKS1
TMmCKS1
: Subclock frequency
: Main clock frequency
When changing the value of TMnCE from 0 to 1, it is not possible to set
the value of the TMnCKS2 to TMnCKS0 bits simultaneously.
6
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Address: TM0CTL0 FFFFFA80H, TM1CTL0 FFFFFA90H,
Internal clock operation enable/disable specification
TMmCKS0
TMmCKS0
5
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TM2CTL0 FFFFFAA0H, TM3CTL0 FFFFFAB0H
4
0
CHAPTER 10 16-BIT INTERVAL TIMER M (TMM)
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
R
XT
XX
XX
XX
XX
XX
XX
XX
XX
/8
/2
/4
/64
/512
/1024
/2
/4
/8
/16
/64
/256
/512
/1024
3
0
Count clock selection
Count clock selection
f
f
XX
XX
1.33
5.33
10.7
21.3
20.8 ns
41.7 ns
83.3 ns
1.33 s
10.7 s
21.3 s
36.4 s
30.5 s
41.7 ns
83.3 ns
167 ns
333 ns
= 48 MHz
= 48 MHz
TMnCKS2 TMnCKS1 TMnCKS0
μ
μ
μ
μ
μ
μ
μ
μ
μ
2
s
s
s
s
f
f
XX
XX
36.4
30.5
2.00
8.00
16.0
32.0
31.3 ns
62.5 ns
2.00 s
16.0 s
32.0 s
62.5 ns
125 ns
125 ns
250 ns
500 ns
= 32 MHz
= 32 MHz
1
μ
μ
μ
μ
μ
μ
μ
μ
μ
s
s
s
s
s
s
f
f
XX
XX
36.4
30.5
2.67
10.7
21.3
42.7
41.7 ns
83.3 ns
2.67 s
21.3 s
42.7 s
83.3 ns
167 ns
167 ns
333 ns
667 ns
= 24 MHz
= 24 MHz
0
μ
μ
μ
μ
μ
μ
μ
μ
μ
s
s
s
s
s
s
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