UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 215

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) 16-bit counter
(2) CCR0 buffer register
(3) CCR1 buffer register
(4) Edge detector
(5) Output controller
(6) Selector
This 16-bit counter can count internal clocks or external events.
The count value of this counter can be read by using the TAAnCNT register.
When the TAAnCTL0.TAAnCE bit = 0, the value of the 16-bit counter is FFFFH. If the TAAnCNT register is read at
this time, 0000H is read.
Reset sets the TAAnCE bit to 0. Therefore, the 16-bit counter is set to FFFFH.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TAAnCCR0 register is used as a compare register, the value written to the TAAnCCR0 register is
transferred to the CCR0 buffer register. When the count value of the 16-bit counter matches the value of the CCR0
buffer register, a compare match interrupt request signal (INTTAAnCC0) is generated.
The CCR0 buffer register cannot be read or written directly.
Reset clears the TAAnCCR0 register to 0000H. Therefore, the CCR0 buffer register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TAAnCCR1 register is used as a compare register, the value written to the TAAnCCR1 register is
transferred to the CCR1 buffer register. When the count value of the 16-bit counter matches the value of the CCR1
buffer register, a compare match interrupt request signal (INTTAAnCC1) is generated.
The CCR1 buffer register cannot be read or written directly.
Reset clears the TAAnCCR1 register to 0000H. Therefore, the CCR1 buffer register is cleared to 0000H.
This circuit detects the valid edges input to the TIAAm0 and TIAAm1 pins. No edge, rising edge, falling edge, or
both the rising and falling edges can be selected as the valid edge by using the TAAmIOC1 and TAAmIOC2
registers.
This circuit controls the output of the TOAAm0 and TOAAm1 pins. The outputs of the TOAAm0 and TOAAm1 pins
are controlled by the TAAmIOC0 register.
This selector selects the count clock for the 16-bit counter. Eight types of internal clocks or an external event can
be selected as the count clock.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
Page 215 of 1509