UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 676

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(2) Real-time output port control register 0 (RTPC0)
The RTPC0 register is a register that sets the operation mode and output trigger of the real-time output port.
The relationship between the operation mode and output trigger of the real-time output port is as shown in Table
14-3.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
BYTE0
0
1
RTPC0
Notes 1. When the real-time output operation is disabled (RTPOE0 bit = 0), all real-time output
Caution Set the RTPEG0, BYTE0, and EXTR0 bits only when the RTPOE0 bit = 0.
After reset: 00H
Table 14-3. Operation Modes and Output Triggers of Real-Time Output Port
EXTR0
0
1
0
1
2. The INTTAA0CC0 signal is output for 1 clock of the count clock selected by TAA0.
RTPOE0
RTPEG0
RTPOE0
BYTE0
4 bits × 1 channel,
2 bits × 1 channel
6 bits × 1 channel
< >
pins (RTP00 to RTP05) output “0”.
0
1
0
1
0
1
Operation Mode
Disables operation
Enables operation
Falling edge
Rising edge
4 bits × 1 channels, 2 bits × 1 channels
6 bits × 1 channels
RTPEG0
R/W
Specification of channel configuration for real-time output
Address: FFFFF6E5H
BYTE0
Note 2
Note 1
Control of real-time output operation
INTTAA5CC0
INTTAA4CC0
INTTAA4CC0
INTTAA0CC0
Valid edge of INTTP0CC0 signal
CHAPTER 14 REAL-TIME OUTPUT FUNCTION (RTO)
RTBH0 (RTP04, RTP05)
EXTR0
0
0
INTTAA4CC0
INTTAA0CC0
RTBL0 (RTP00 to RTP03)
0
0
Page 676 of 1509

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