UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1336
UPD70F3771GF-GAT-AX
Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3771GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 1336 of 1512
- Download datasheet (9Mb)
V850ES/JG3-H, V850ES/JH3-H
26.3.5 Reset function operation flow
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Notes 1. Bit to be set differs depending on the reset source.
2. The internal oscillator cannot be stopped.
RESET pin
WDT2
CLM
LVI
Reset Source
(in emergent operation mode)
0
1
Value before reset is retained. 1
Value before reset is retained. Value before reset is retained. 1
CPU operation starts from reset address
Internal oscillation and main clock
WDT2RF Bit
Start (reset source occurs)
No
Reset source generated?
Set RESF register
oscillation stabilization
CCLS.CCLSF bit = 1?
Emergent operation
Firmware operation
WDT2 count up starts
Reset occurs
(f
oscillation start,
time secured?
reset release
CPU
(reset mode)
Main clock
f
CPU
= f
= f
X
Yes
operation mode)
Yes
Yes
/8, f
X
(in normal
R
→
)
Note 1
0
Value before reset is retained. Value before reset is retained.
No
No
No
(in normal operation mode)
CRMRF Bit
CCLS.CCLSF bit ← 1
Normal operation
WDT2 overflow?
WDT2 restart
f
CPU
Software processing
= f
CHAPTER 26 RESET FUNCTIONS
Yes
R
Note 2
(in emergent operation mode)
0
Value before reset is retained.
No
LVIRF Bit
Page 1336 of 1509
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