UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 382

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(e) Generation timing of compare match interrupt request signal (INTTABnCCk)
CCRk buffer register
INTTABnCCk signal
TOABnk pin output
The timing of generation of the INTTABnCCk signal in the external trigger pulse output mode differs from the
timing of other INTTABnCCk signals; the INTTABnCCk signal is generated when the count value of the 16-bit
counter matches the value of the CCRk buffer register.
Remark
Usually, the INTTABnCCk signal is generated in synchronization with the next count-up after the count value of
the 16-bit counter matches the value of the CCRk buffer register.
In the external trigger pulse output mode, however, it is generated one clock earlier. This is because the timing
is changed to match the timing of changing the output signal of the TOABnk pin.
16-bit counter
Count clock
k = 1 to 3,
n = 0, 1
D
k
− 2
D
k
− 1
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
D
D
k
k
D
k
+ 1
D
k
+ 2
Page 382 of 1509

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