UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 82

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

80
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FFFFF848H
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FFFFF880H
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Address
Week count setting register
Week count setting register L
Week count setting register H
System status register
DMA trigger factor register 0
DMA trigger factor register 1
DMA trigger factor register 2
DMA trigger factor register 3
Power save mode register
Processor clock control register
Correction address register 0
Correction address register 0L
Correction address register 0H
Correction address register 1
Correction address register 1L
Correction address register 1H
Correction address register 2
Correction address register 2L
Correction address register 2H
Correction address register 3
Correction address register 3L
Correction address register 3H
Correction control register
Prescaler mode register
Prescaler compare register
UART0 operation mode register
Receive buffer register 0
UART0 reception error status register
Transmit buffer register 0
UART0 transmit status register
Clock select register 0
Baud rate generator compare register 0
UART1 operation mode register
Receive buffer register 1
UART1 reception error status register
Transmit buffer register 1
UART1 transmit status register
Clock select register 1
Baud rate generator compare register 1
Function Register Name
CHAPTER 3 CPU FUNCTION
User’s Manual U15905EJ2V1UD
WEEKB
WEEKBL
WEEKBH
SYS
DTFR0
DTFR1
DTFR2
DTFR3
PSMR
PCC
CORAD0
CORAD0L
CORAD0H
CORAD1
CORAD1L
CORAD1H
CORAD2
CORAD2L
CORAD2H
CORAD3
CORAD3L
CORAD3H
CORCN
PRSM
PRSCM
ASIM0
RXB0
ASIS0
TXB0
ASIF0
CKSR0
BRGC0
ASIM1
RXB1
ASIS1
TXB1
ASIF1
CKSR1
BRGC1
Symbol
R/W
R/W
R/W
R/W
R/W
R/W
W
R
R
R
R
1
√
√
√
√
√
√
√
√
√
√
√
√
Manipulatable Bits
8
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
16
√
√
√
√
√
√
√
√
√
32
√
√
√
√
0000H
00H
00H
03H
00000000H
0000H
00000000H
0000H
00000000H
0000H
00000000H
0000H
00H
01H
FFH
00H
FFH
00H
FFH
01H
FFH
00H
FFH
00H
FFH
Default Value
(6/8)