UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 191

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UPD70F3201YGC-YEU-A

Manufacturer Part Number
UPD70F3201YGC-YEU-A
Description
MCU 32BIT I2C 100TQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Sx2r
Datasheet

Specifications of UPD70F3201YGC-YEU-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
68
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 2.7 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3201YGC-YEU-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
5.6.2
inserted in the bus cycle by using the external wait pin (WAIT).
external wait function, in the same manner as the programmable wait function.
and TW states of the bus cycle in the multiplexed bus mode. In the separate bus mode, it is sampled at the rising
edge of the clock immediately after the T1 and TW states of the bus cycle. If the setup/hold time of the sampling
timing is not satisfied, a wait state is inserted in the next state, or not inserted at all.
To synchronize an extremely slow external device, I/O, or asynchronous system, any number of wait states can be
Access to each area of the internal ROM, internal RAM, and internal peripheral I/O is not subject to control by the
The WAIT signal can be input asynchronously to CLKOUT, and is sampled at the falling edge of the clock in the T2
External wait function
CHAPTER 5 BUS CONTROL FUNCTION
User’s Manual U15905EJ2V1UD
189

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