UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 476

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

474
Main clock oscillator (f
Subclock oscillator (f
Peripheral clock (f
internal system clock (f
CPU clock (f
WDT clock (f
Internal RAM
I/O lines (ports)
On-chip peripheral I/O registers
Real-time counter
Other on-chip peripheral functions
Main clock oscillator (f
Subclock oscillator (f
Peripheral clock (f
internal system clock (f
CPU clock (f
WDT clock (f
Internal RAM
I/O lines (ports)
On-chip peripheral I/O registers
Real-time counter
Other on-chip peripheral functions
Notes 1. The on-chip feedback resistor is “connected” by default (refer to 6.3 (1) Processor clock control
Notes 1. The on-chip feedback resistor is “connected” by default (refer to 6.3 (1) Processor clock control
2. The real-time counter performs a count operation on the subclock when the RESET signal is input.
2. The real-time counter performs a count operation on the subclock when the RESET signal is input.
CPU
CPU
XW
XW
register (PCC)).
If a clock resulting from dividing the main clock (f
clock, the count clock is changed to the subclock (f
register (PCC)).
If a clock resulting from dividing the main clock (f
clock, the count clock is changed to the subclock (f
)
)
)
)
Item
Item
XX
XX
to f
to f
XT
XT
X
X
)
)
)
XX
)
XX
XX
XX
),
),
/1024),
/1024),
Table 19-2. Hardware Status on Occurrence of WDTRES
Table 19-1. Hardware Status on RESET Pin Input
Oscillation stops (f
Oscillation can continue without effect from reset
Operation stops
Operation stops
Undefined if power-on reset occurs or writing data to RAM and reset conflict (data loss).
Otherwise, retains values immediately before reset input.
High impedance
Initialized to specified status
Operation can be started
Operation stops
Oscillation continues
Oscillation can continue without effect from reset
Operation stops
Operation continues
Undefined if writing data to RAM and reset conflict (data loss).
Otherwise, retains values immediately before reset input.
High impedance
Initialized to specified status
Operation continues
Operation stops
CHAPTER 19 RESET FUNCTION
User’s Manual U15905EJ2V1UD
During Reset
During Reset
X
= 0 level).
Note 2
Note 1
Note 2
X
X
) by the baud rate generator (f
) by the baud rate generator (f
XT
XT
).
).
Oscillation starts
Operation starts.
However, operation stops during
oscillation stabilization time count.
Operation can be started
Operation can be started
Operation starts
Operation starts
Note 1
Note 1
.
.
After Reset
After Reset
BRG
BRG
) is used as the count
) is used as the count