UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 255
UPD70F3201YGC-YEU-A
Manufacturer Part Number
UPD70F3201YGC-YEU-A
Description
MCU 32BIT I2C 100TQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Sx2r
Datasheet
1.UPD70F3201YGC-YEU-A.pdf
(555 pages)
Specifications of UPD70F3201YGC-YEU-A
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
68
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 2.7 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3201YGC-YEU-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Caution In the case of reload from the CRn register between <1> and <2>, the value that is actually
Remark
When the value of the CRn register changes from N to M before the rising edge of the FFH clock
When the value of the CRn register changes from N to M after the rising edge of the FFH clock
→ The value of the CRn register is reloaded at the overflow that occurs immediately after.
→ The value of the CRn register is reloaded at the second overflow.
(b) Operation based on CRn register transitions
TMn count value
TMn count value
used differs (Read value: M; Actual value of CRn register: N).
n = 2 to 5
Count clock
Count clock
INTTMn
INTTMn
TMCEn
TMCEn H
Figure 8-6. Timing of Operation Based on CRn Register Transitions
CRn
TOn
CRn
TOn
<1> CRn transition (N → M)
H
N N + 1 N + 2
N N + 1 N + 2
<1> CRn transition (N → M)
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 2 TO 5
N
N
FFH
User’s Manual U15905EJ2V1UD
FFH
00H 01H
N
00H 01H
<2>
02H
02H
03H
M
M
N
M + 1 M + 2
N + 1 N + 2
FFH
FFH
<2>
00H 01H
00H 01H
M
02H
02H
M M +Ê1M + 2
M M + 1 M + 2
253
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